Microchip Flip Flop Logic Gates

D flip-flops: CML output

Logic gates

Microchip Series	Function	Input Type	Supply Voltage (V)	Propagation Delay (Max) (ps)	Setup Time (Min)(ns)	Hold Time (Min)(ns)	Packages	Datasheet
Microchip Series	Function	Input Type	Supply Voltage (V)	Propagation Delay (Max) (ps)	Setup Time (Min)(ns)	Hold Time (Min)(ns)	Packages	Datasheet
SY100EL29	D Flip Flop	Differential	3.3/5	700	200	150	20/SOIC
SY100EL52	D Flip Flop	ECL	5	365	0	50	8/SOIC
SY10EP05V	And/Nand Gate	ECL	3.3/5	180	0	0	8/SOIC
SY10EP51V	D Flip Flop	ECL	3.3/5	320	80	40	8/SOIC
SY55851A	Registers and Flip Flops	LVPECL/CML	2.5/3.3	350	0	0	10/MSOP
SY55852U	D Flip Flop	CML, PECL, LVPECL	2.5/3.3/5	400	40	40	10/MSOP
SY58051AU	Universal Gate	CML, PECL	2.5/3.3	160	0	0	16/VQFN